4 Jobs found

HOW TO APPLY? PLEASE SEND YOUR CV TO [email protected] - REFERENCE 11575 AS ANALOG ARCHITECTURE JUNIOR ENGINEER, YOU WILL WORK WITH A TEAM OF ENGINEERS TO DEVELOP AND VERIFY ANALOG AND POWER ARCHITECTURE FOR SYSTEM-ON-CHIP (SOC) DESIGNS, YOU WILL SUPPORT ANALOG IP INTEGRATION, POWER MANAGEMENT DEVELOPMENT AND VERIFICATION, VALIDATION OF POWER ESTIMATION MODEL AT CHIP AND SYSTEM LEVEL.IN THIS TEAM YOUR RESPONSIBILITY WILL INCLUDE, BUT NOT LIMITED, TO:DESIGN ANALOG IP TO IMPROVE PPA (PERFORMANCE-POWER-AREA).EVALUATE AND VERIFY ANALOG IP INTEGRATION.SUPPORT FULL-CHIP AMS VERIFICATION.SUPPORT MODELING AND ANALYSIS OF HIGH-SPEED INTERCONNECTS IN CHIPLETS,... REQUIRED SKILLS, QUALIFICATIONS AND EXPERIENCE: MASTER'S OR PHD IN COMPUTER ENGINEERING, ELECTRICAL ENGINEERING, OR RELATED FI...

HOW TO APPLY? PLEASE SEND YOUR CV TO [email protected] - REFERENCE 11621 RESEARCH AND DEVELOP NOVEL MICRO-ARCHITECTURES AND DESIGNS FOR HIGH-PERFORMANCE MATRIX/TENSOR PROCESSING UNITS WITH A FOCUS ON ENABLING EFFICIENT SOFTWARE EXECUTION.INNOVATE AND ARCHITECT THE NEXT GENERATION OF HIGH-PERFORMANCE AI ACCELERATORS, CONSIDERING THE INTERPLAY BETWEEN HARDWARE CAPABILITIES AND SOFTWARE REQUIREMENTS.DRIVE SOFTWARE-HARDWARE CO-DESIGN EFFORTS TO OPTIMIZE OVERALL SYSTEM PERFORMANCE AND EFFICIENCY FOR AI WORKLOADS.SUPPORT THE DEVELOPMENT OF OPTIMIZED ARCHITECTURES CAPABLE OF SIGNIFICANTLY IMPROVING PPA (PERFORMANCE-POWER-AREA) WHILE EFFECTIVELY INTEGRATING CUSTOMER REQUIREMENTS AND CONSIDERING SOFTWARE IMPLICATIONS.EVALUATE THE ARCHITECTURAL IMPLEMENTATION OF VPU AND MPU DESIGNS, ENSU...

DIGITAL SENIOR ENGINEER. THE ROLE: RESPONSIBILITIES INCLUDE BUT NOT LIMITED TO: - TO DRIVE DESIGN EXECUTION OF SILICON DESIGN FROM DEFINITION THROUGH PRODUCT LAUNCH AND ACTS AS PRIMARY POINT OF CONTACT FOR A IP DEVELOPMENT AND IP INTEGRATION IN SOC.- TO COLLABORATE WITH A MULTIDISCIPLINARY PROJECT TEAM DESIGN FOR SILICON PRODUCTS.- TO WORK IN TIGHT COLLABORATION WITH EMULATION, VERIFICATION, AND VALIDATION DEVELOPMENT TEAMS TO ENSURE BUG FREE DESIGN.- TO WORK ACROSS IP AND SOC DEVELOPMENT TEAMS TO ENSURE DELIVERY OF COMPLEX SILICON DESIGN PROJECTS.-TO ENSURE THAT THE FINAL DESIGN MEETS THE KEY FACTORS- TO WORK CONTINUOUSLY TO IMPROVE SILICON DEVELOPMENT PROCESSES AND ARCHITECTURE DEFINITION- TO WORK WITH POST-SILICON VALIDATION, MANUFACTURING, PLATFORM, AND SOFTWARE STAKEHOLDERS THROUGHOUT...

KEY RESPONSIBILITIES:MAKE INDEPENDENT TECHNICAL CONTRIBUTIONS TO HELP THEIR TEAM DELIVER ITS COMMITMENTS. IN PARTICULAR: COLLECT, CLEAN, AND MAINTAIN DATA FOR ML MODEL TRAINING AND EVALUATION, INCORPORATING DATA GOVERNANCE TO COMPLY WITH PRIVACY REQUIREMENTS.  IMPLEMENT PUBLISHED ML MODELS AND REPLICATE EXPERIMENTAL RESULTS. DEVELOP NEW ML MODELS, IDENTIFY TRAINING REGIMES, AND PROVIDE QUALITY EVALUATIONS. DOCUMENT THE FOLLOWED METHODOLOGIES AND MAIN FINDINGS.ASSESS AND OPTIMIZE MODEL PERFORMANCE AND RESOURCE CONSUMPTION (POWER, MEMORY, CPU/GPU/NNU...), CONSIDERING FUNCTIONAL AND NON-FUNCTIONAL REQUIREMENTS (QPS, PRIVACY CONSTRAINTS...). DEPLOY ML MODELS IN PRODUCTION, INTERACTING WITH INFRASTRUCTURE TEAMS. CONTRIBUTE TO MODEL RELEASE, QUALITY ASSESSMENT, AND DEBUGGING. DEVELOP AND MAINTAI...